$INTC $TSM $NVDA $AMD Outstanding interview of LBT. It gives me the conviction to stay long the GAI infrastructure trade even after this massive run up. I love his comment that he is targeting a 10x shareholder-return for INTC - he’s already making progress towards the goal.
EXECUTIVE OVERVIEW
No Priors is an AI-focused podcast hosted by Sarah Guo and Elad Gil. Guo is the founder of Conviction and a former Greylock investor, while Gil is a serial entrepreneur and investor associated with Color Health, Mixer Labs, and early investments across a large cohort of $1B+ technology companies. The episode features Intel CEO Lip-Bu Tan, former CEO of Cadence and longtime semiconductor investor, discussing Intel’s turnaround, the U.S. semiconductor supply chain, AI-driven compute demand, Intel Foundry, strategic capital from the U.S. government, Nvidia and SoftBank, and Intel’s collaboration with Elon Musk’s Terafab initiative. Tan became Intel CEO in March 2025 after a long operating and investing career spanning EDA, semiconductors, software, and venture capital.
The investment relevance of the episode is high because Tan provides a relatively explicit framework for Intel’s strategic reset: 1) repair the balance sheet, 2) restore engineering accountability and customer orientation, 3) simplify and improve the product roadmap, 4) exploit AI inference and agentic workload shifts that increase CPU relevance, 5) pursue foundry only where customer commitments, yield learning, advanced packaging, and national supply-chain needs justify the capital burden, and 6) move Intel from a legacy component vendor toward a full-stack compute infrastructure platform. The message is materially more coherent than prior Intel turnaround narratives because it links capital formation, customer validation, product strategy, foundry strategy, and culture into a 2030-2032 execution path rather than framing Intel Foundry as an abstract national-security imperative detached from commercial economics.
The core investment issue remains unchanged: Intel’s product franchise can likely fund a meaningful portion of the turnaround, but Intel Foundry still requires proof that external customers will commit volume at acceptable economics before depreciation, capex, yield loss, and learning-curve costs consume product cash flow. Intel’s 2025 Foundry revenue was $17.8B, but external Foundry revenue was only $307M, while the Foundry segment generated a $10.3B operating loss. In Q1 2026, Foundry revenue was $5.4B, external Foundry revenue was $174M, and Foundry still generated a $2.4B operating loss. That gap between strategic ambition and commercial foundry monetization is the central underwriting variable.
The episode should be interpreted as a management roadshow for a long-duration, high-beta, policy-supported AI infrastructure turnaround. Tan’s comments suggest that Intel is being repositioned as a strategic U.S. compute platform rather than a conventional merchant CPU company. The investment case is therefore no longer only “can Intel regain CPU share?” It is now “can Intel combine CPUs, x86 ecosystem scale, advanced packaging, domestic manufacturing, strategic customers, government capital, and full-stack systems capability into a differentiated alternative to the TSMC-Nvidia-centered AI supply chain?” That thesis has real option value, but the burden of proof is unusually high because the current market has already capitalized a large portion of the turnaround narrative.
STRATEGIC MESSAGE FROM TAN
Tan’s most important statement is not the aspirational 10x shareholder-return target. The most important statement is his repeated framing of Intel as a company that must “crawl, walk, run.” This language indicates a deliberately staged turnaround rather than an attempt to claim immediate parity with TSMC, Nvidia, AMD, or leading AI infrastructure platforms. The 1st stage is balance-sheet stabilization and cultural reset. The 2nd stage is product execution in client, data center, inference, agentic AI, and edge/physical AI. The 3rd stage is foundry credibility through yield, defect density, cycle time, IP availability, advanced packaging, and customer trust. The 4th stage is full-stack solutions, including silicon, software, packaging, and potentially rack-scale systems.
The tone is notable for its relative humility on foundry. Tan does not imply that Intel can displace TSMC through nationalism or subsidies alone. He describes foundry as a service business and a trust business in which customers will not allocate wafers until yield, reliability, IP, cycle time, and execution predictability are proven. This is a critical departure from a purely supply-side view of semiconductor reshoring. A foundry cannot be willed into existence by capital spending alone; it must be qualified into customer product roadmaps that have extremely low tolerance for yield excursions, schedule slips, and revenue-miss risk. Tan’s comments implicitly acknowledge that Intel’s historical weakness has not been lack of ambition, but rather failure to translate technical roadmaps into customer-trusted manufacturing execution.
The episode also clarifies Tan’s view of Intel’s competitive identity. He is not pitching Intel as a narrower CPU share-recapture story. He is describing Intel as a portfolio of bottleneck assets: x86 CPUs, server attach, client installed base, process technology, advanced packaging, U.S. manufacturing footprint, engineering talent, and potential system-level integration. The operating question is whether those assets can be recombined quickly enough to matter in the AI infrastructure cycle. This is a critical nuance because Intel is unlikely to win by replicating Nvidia’s GPU/software stack or TSMC’s pure-play foundry model. The plausible path is a more hybrid architecture: CPUs and xPUs for inference, orchestration, edge, robotics, and agentic workloads; foundry and packaging for customers seeking supply-chain resilience; and software/system integration to reduce friction.
BALANCE SHEET AND STRATEGIC CAPITAL
Tan’s 1st explicit priority is balance-sheet repair, and the actions taken since 2025 are central to the investment case. The U.S. government agreed to invest $8.9B in Intel common stock, funded by remaining CHIPS Act grant proceeds and the Secure Enclave program, in addition to $2.2B of CHIPS grants already received. The government purchase was structured as 433.3M shares at $20.47 per share, representing a 9.9% stake, with passive ownership, no board seat, no governance rights, and a 5-year warrant for an additional 5% that is exercisable only if Intel’s ownership of the foundry business falls below 51%.
This structure is strategically positive and strategically constraining at the same time. It is positive because it extends Intel’s financial runway, formalizes Intel’s role as a U.S. national semiconductor asset, and provides a government-sponsored confidence signal to customers, suppliers, employees, and other capital providers. It is constraining because the 5% warrant tied to foundry ownership creates a deterrent to aggressive externalization or deconsolidation of Intel Foundry. In practice, Intel appears incentivized to retain control of foundry even if external capital, joint ventures, or customer prepayments might otherwise be an attractive route to reducing balance-sheet burden. Reuters reported that Intel had received $5.7B in cash from the U.S. government and that the warrant structure is intended to incentivize Intel to retain control of the foundry business.
The strategic-capital stack also includes Nvidia’s planned $5B investment and SoftBank’s planned $2B investment. Nvidia and Intel announced a collaboration under which Intel will design and manufacture custom data center and client CPUs with Nvidia NVLink integration, including custom x86 CPUs for Nvidia AI infrastructure and x86 SoCs integrating Nvidia RTX GPU chiplets for PCs. Nvidia agreed to invest $5B in Intel common stock at $23.28 per share, subject to conditions. SoftBank agreed to invest $2B at $23 per share, also subject to conditions.
The importance of Nvidia’s involvement is not merely financial. Nvidia is the dominant AI accelerator platform, and its willingness to collaborate with Intel on custom x86 CPUs and NVLink-connected architectures validates Intel’s continuing relevance as a host CPU and system partner in AI infrastructure. It also creates a potential route for Intel to defend or expand CPU attach in AI systems where GPU clusters still require host orchestration, I/O coordination, memory management, control-plane functions, and system-level integration. However, the deal should not be interpreted as Nvidia transferring leading-edge GPU wafer demand to Intel. The disclosed collaboration is centered on Intel custom CPUs, Nvidia NVLink integration, and PC SoCs with Nvidia GPU chiplets, not on Intel replacing TSMC as Nvidia’s primary leading-edge GPU foundry.
At year-end 2025, Intel had $37.4B of cash and short-term investments and $46.6B of total debt. Operating cash flow was $9.7B in 2025, but adjusted free cash flow was still negative $1.6B after net capex and finance-lease payments. This balance-sheet profile is materially improved by strategic capital, but it is not yet a conventional high-quality free-cash-flow compounder. Intel remains a capital-intensive turnaround with a large debt load, large manufacturing commitments, a loss-making foundry segment, and a need to fund advanced nodes, packaging, product engineering, and customer qualification cycles simultaneously.
CULTURE AND OPERATING MODEL
Tan’s culture commentary is highly relevant because Intel’s core failure over the last decade was not a lack of semiconductor knowledge. It was a failure of execution discipline, customer responsiveness, roadmap reliability, manufacturing cadence, and internal accountability. Tan’s decision to have engineering report directly to him is therefore a governance signal. It implies that the turnaround is being run as an engineering reset rather than a purely financial restructuring. Intel has also publicly emphasized an engineering-first culture, customer feedback, roadmap discipline, financial discipline in Foundry, accountability, direct feedback, and AI-era skills.
The emphasis on “startup culture” inside Intel should be treated as necessary but not sufficient. It is necessary because advanced semiconductor execution requires rapid cross-functional iteration across design, manufacturing, packaging, EDA, process integration, and customer engineering. It is not sufficient because Intel’s scale, union of product and manufacturing complexity, government stakeholder base, and existing installed organization create large inertial forces. The real evidence will be measurable: faster product decision cycles, fewer roadmap resets, improved yield learning, tighter cycle times, better customer tapeout cadence, higher external foundry backlog, reduced organizational layering, and stronger senior technical hiring.
The management philosophy described in the episode mirrors Tan’s Cadence experience. Intel’s official biography states that during his Cadence CEO tenure, he led a reinvention that more than doubled revenue, expanded operating margins, and produced market outperformance. The Cadence analogy has investment relevance because EDA turnarounds require customer intimacy, technical credibility, software discipline, and recurring ecosystem integration. However, the analogy has limits. Cadence was an asset-light software and EDA platform relative to Intel’s current burden of fabs, process transitions, inventory cycles, manufacturing depreciation, political stakeholders, and foundry underutilization.
CPU RELEVANCE IN AGENTIC AI AND INFERENCE
The most investable product claim in the interview is Tan’s view that AI workload evolution increases CPU relevance. The training phase of AI infrastructure has been GPU-dominated. The inference, agentic, reinforcement-learning, orchestration, retrieval, tool-use, memory, control-plane, and edge phases are more heterogeneous. Tan’s assertion that the CPU-to-GPU ratio may move from roughly 1:8 toward 1:4, or potentially tighter in some workloads, is plausible in direction, although the exact ratio will vary by system architecture, model type, batching, latency requirement, data movement, memory hierarchy, and deployment environment.
Intel’s reported DCAI performance provides some support for the claim. In Q1 2026, Intel’s DCAI revenue was $5.1B, up 22% YoY, and DCAI operating income was $1.5B. Intel also stated that AI workloads were accelerating from training to inference to agentic AI, that ASIC revenue grew more than 30% sequentially and nearly doubled YoY, that Xeon 6 was selected as the host CPU for Nvidia DGX Rubin NVL8, and that SambaNova was using Xeon 6 in a heterogeneous AI inference architecture.
The CPU thesis should be underwritten as an attach-rate and workload-mix opportunity, not as a direct substitute for GPU economics. Nvidia retains the dominant profit pool in training and accelerated computing through CUDA, networking, systems, software libraries, and rack-scale integration. CPUs can become more important without capturing Nvidia-like margins. The relevant Intel upside is improved server CPU units, ASPs, platform relevance, custom CPU opportunities with Nvidia and hyperscalers, and better positioning in inference and agentic workloads where latency, memory coherence, control flow, and orchestration matter. The strategic question is whether Intel can make Xeon and related custom x86 products the default control-plane and host architecture for the next generation of AI systems.
Tan’s framing of edge and physical AI is also significant. Robotics, autonomous systems, defense, industrial automation, and on-device AI require local compute because connectivity, latency, privacy, reliability, and safety constraints often preclude dependence on centralized inference. This creates a credible rationale for Intel to defend client and edge compute as AI endpoints. The risk is that Arm-based SoCs, Nvidia edge platforms, Qualcomm, Apple silicon, AMD APUs, and custom ASICs also compete aggressively in these environments. Intel’s installed x86 ecosystem is meaningful, but edge AI will not default to Intel unless performance-per-watt, software support, developer experience, and cost are competitive.
FOUNDRY STRATEGY AND COMMERCIAL REALITY
The foundry discussion is the hardest part of the investment case. Tan presents foundry as strategically indispensable for the U.S. and for resilient semiconductor supply chains. That framing is credible. Advanced logic manufacturing capacity remains geographically concentrated, and U.S. policymakers, hyperscalers, defense customers, and large technology companies all have reasons to want additional trusted advanced-node capacity outside Taiwan. Intel’s 2025 Form 10-K states that Intel is the only U.S. company doing leading-edge logic R&D and high-volume manufacturing in the U.S., which is a genuine strategic asset.
However, the commercial reality remains severe. Intel Foundry’s external revenue base is still small relative to its cost structure. The 2025 Foundry operating loss of $10.3B and Q1 2026 Foundry operating loss of $2.4B indicate that the business is far from self-funding. Internal transfer revenue cannot validate a merchant foundry model. The metric that matters is external customer revenue, external wafer commitments, external tapeouts, external backlog, and gross-margin trajectory after customer qualification. The Foundry business will become investable only when customer demand moves from strategic discussions and early design engagements to contracted volume with yield and utilization visibility.
Terafab is therefore a high-upside but high-uncertainty datapoint. Reuters reported that Intel joined Elon Musk’s Terafab initiative with SpaceX and Tesla and that the project aims at 1 terawatt per year of compute, an extremely large target. Reuters also reported that Tesla plans to use Intel 14A for a Terafab AI chip complex in Austin and that such a contract would mark Intel’s 1st major customer for 14A, but details remain limited and mass production timing is reportedly several years out.
The market should not value Terafab as current revenue. It should be valued as external validation, customer-led process learning, and a potential anchor demand source for 14A if contractual commitments, prepayments, design maturity, and volume schedules become visible. The risk is that Terafab’s ambition is so large that it may be more concept than near-term procurement pipeline. Its strategic value is nevertheless meaningful because Tesla, SpaceX, and xAI have enough compute ambition to pressure conventional supply-chain assumptions, and Musk’s willingness to challenge manufacturing norms could force process, packaging, cycle-time, and capacity-planning innovation.
Apple-related reports add another possible external validation vector, but also require caution. Reuters reported that President Trump said Apple had agreed to work with Intel to design and manufacture chips in the U.S., and analysts viewed a potential Apple contract as reputationally important because it would help lock in demand and validate Intel’s manufacturing ramp. However, the specific chips, volumes, timing, economics, and manufacturing responsibilities were not disclosed in the report. Apple and Intel did not provide equivalent granular confirmation in that report.
The foundry underwriting case should be split into 3 layers. The 1st layer is advanced packaging and system integration, where Intel may have a more realistic near-term wedge. The 2nd layer is internal product manufacturing on 18A and 18A-P, where success can improve Intel Products competitiveness even without large external customers. The 3rd layer is true external leading-edge foundry at 14A and beyond, where the payoff could be large but qualification cycles, customer concentration, process risk, and capital intensity make evidence sparse. The market should assign different probabilities and time horizons to each layer rather than treating “Intel Foundry” as a single binary bet.
ADVANCED PACKAGING AS A STRATEGIC WEDGE
Tan’s comments on advanced packaging are especially important. The industry’s bottleneck is no longer only transistor density. CoWoS capacity, HBM integration, substrate constraints, thermal management, chiplet integration, interconnect density, and rack-level power delivery are now central constraints in AI systems. This improves the strategic value of advanced packaging capabilities even if Intel does not immediately win large external leading-edge logic wafer share.
Intel has reorganized to emphasize this opportunity. Intel appointed Seok-Hee Lee as EVP of Intel Foundry, with responsibility including advanced packaging, system integration, and back-end operations, and identified packaging as a focused business while referencing EMIB-T and HBI high-volume packaging technologies. The same announcement emphasized accelerating 18A, 14A, and future process technologies and building an operating model that improves customer confidence, speed, and predictability.
This supports a credible strategic path: Intel may find commercial traction first in advanced packaging, heterogeneous integration, CPU/GPU/ASIC chiplet connectivity, and system-level integration before achieving broad parity in merchant leading-edge logic. For AI infrastructure customers, the package, memory interface, interconnect, power delivery, and thermal envelope can be as important as the transistor node. Intel’s EMIB, Foveros, glass substrate work, and back-end integration could become commercially valuable even in scenarios where TSMC remains the dominant front-end manufacturer for the most advanced GPUs.
The key risk is that advanced packaging itself is becoming fiercely competitive. TSMC’s CoWoS franchise remains deeply embedded in Nvidia and hyperscaler AI systems. Samsung, ASE, Amkor, UMC-linked partners, substrate suppliers, and OSAT ecosystems are all investing aggressively. Intel must demonstrate not only technology capability, but also high-volume yield, customer qualification, cost competitiveness, and supply-chain reliability. The packaging wedge is attractive, but it is not uncontested.
